[NTLK] Random findings on hardware registers
Matthias Melcher
mm at matthiasm.com
Sun Feb 12 04:40:10 EST 2017
To the hackers on the list:
I have been working on implementing the hardware emulation in Einstein that we need to get the external serial port working for the emulation. With a bit of luck, we will be able to use NCX and all the other programs to connect to Einstein running on the same or even another machine.
The good news: I am able to send and receive data!
The snot so good news: I have very little time to convert this from a hack into a stable interface, but I will continue to work on it.
In relation to the other thread in which we try to find the documentation, here are my findings:
Additions and corrections are very welcome!
Serial Port Hardware Reverse Engineering
TSerialChipVoyager : TSerialChip : TProtocol
============================================
+36 0x24: HW Base Address
+56 0x38: Recieve buffer size
+100 0x64: bit 7: set if Tx Buffer is full
+116 0x74: Rx: TSerialDMAEngine
+136 0x88: TCircleBuf Rx
+143 0x8F: b: 02 to handle rx int
+144 0x90: w:
Serial port registers starting at 0x0F1C0000
============================================
? kSerReg_BreakDuplex = 0x2400,
0000: w 40
0400: w 06
0800: w 00
0C00: w 02
1000: w 00
2000: w 62 (EnableRxDMA writes 62)
bit 1: write: Clear Rx Error Status?
2400: rw 25 (EnableTxDMA)
bit 0: TxDMAEnable
2800: w 23 (SetTxDTransceiverEnable writes 23)
bit 1: write: set outputs? DTR, RTS?
3000: rw F9 (SetInterruptEnable writes F9) some interrupt status mask?
3400: w F9
3800: w 19
3C00: w 40 (SetIntSourceEnable(0x00000040, 1) writes 40)
bit 7: write: Tx Buffer is empty
4400: r 00
bit 7: read: Tx Buffer is empty
bit 6: read: Rx Buffer is full
bit 5: read: Rx Byte available?
bit 4: read: DCD asserted
bit 3: read: CTS asserted
bit 2: read: Tx underrun (also in 3000)
bit 0: read: Serial abort (also in 3000)
4800: r 00
bit 7, 6, 5, 4: read: Rx Error Status
5000: w 00
5400: w 02
5800: r 00
5C00: r 00
6000: tx byte buffer (non-DMA)
7000: rx byte buffer (non-DAM)
8000: w 00
Serial port DMA
===============
Address Bank, Channel, Register
Receive:
F080000 = 1,0,0: w: rx physical buffer address (InitRxDMA)
F080400 = 1,0,1: w: current buffer address? (RxDMAControl)
F080800 = 1,0,2
F080C00 = 1,0,3: w: 00000080 (RxDMAControl), 00000000
F081000 = 1,0,4: rw: 00000403 buffer count? (RxDMAControl) (reading when shutting down?)
F081400 = 1,0,5: w: 00000404 buffer size? (RxDMAControl)
F081800 = 1,0,6: w: 00000000 (InitRxDMA), 000000FF (RxDMAControl)
F090000 = 2,0,0: w: 00000006 (RxDMAControl), 00000000
F090400 = 2,0,1: r : (RxDMAControl)
F090800 = 2,0,2: w: 00000000 (RxDMAControl)
F090C00 = 2,0,3: w: 00000006 (InitRxDMA)
Transmit:
F082000 = 1,1,0: w: tx physical buffer address (InitTxDMA)
F082400 = 1,1,1: rw: current buffer address? (TxDMAControl)
F082800 = 1,1,2
F082C00 = 1,1,3: w: 000000C0 (TxDMAControl)
F083000 = 1,1,4: rw: number of bytes to write (TxDMAControl)
F083400 = 1,1,5: w: 204, buffer size? (TxDMAControl)
F083800 = 1,1,6: w: 00000000 (InitTxDMA)
F091000 = 2,1,0: w: 00000002 (TxDMAControl)
F091400 = 2,1,1: r : (TxDMAControl)
F091800 = 2,1,2: w: 00000000 (TxDMAControl)
F091C00 = 2,1,3: w: 00000002 (InitTxDMA)
AssignmentRegister: InitByOption is setting bit 2
EnableRegister: w: 00000001, 00000002 (RxDMAControl) // Bits set to 1 will start the DMA transfers.
StatusRegister: Bits set to 1 indicate pending dma transfers.
DisableRegister: w: 00000001, 00000002 // Bits set to 1 will abort the DMA transfers.
WordStatusRegister: r : Bits set to 1 indicate words in channel word registers.
Serial port interrupts
======================
kDMAChannel0IntMask = 0x00000080, // Serial port 0 rcv
kDMAChannel1IntMask = 0x00000100, // Serial port 0 tx
Which register holds the values below?
typedef ULong SerialIntSource; // matches Voyager interrupt mask reg bits
#define kSerIntSrcAbort (0x00000001) // break or abort
#define kSerIntSrcHunt (0x00000002)
#define kSerIntSrcUnderRun (0x00000004)
#define kSerIntSrcCTS (0x00000008)
#define kSerIntSrcDCD (0x00000010)
#define kSerIntSrcRxSpecial (0x00000020)
#define kSerIntSrcRxOnAllChars (0x00000040)
#define kSerIntSrcTxBufEmpty (0x00000080)
#define kSerIntSrcRxOnFirstChar (0x00000100) // may go away
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