Re: NTLK New StrongARM processor

From: Alex Karahalios (alex@karahalios.org)
Date: Sat Aug 26 2000 - 16:52:53 CDT


on 8/26/2000 2:17 PM, Bill Davis at newton@ecity.net wrote:

> I'm not a hardware guy, but I do know the speeds all have to sync up, and can
> cause bottlenecks so that if some of the components aren't fast enough, all
> the additional processor speed in the world won't help past a certain point.
>
Right, but the memory bus speed in StrongARM SA-110 processor used in the
Newton 2x00 is controlled by 3 memory configuration pins (MCCFG). In
addition, the SA-110 also controls the internal clock frequency with 4 core
clock configuration pins (CCCFG). The CCCFG pins let you specify a clock
frequency from 88.3Mhz to 287Mhz. Of course, the chip may not support this
speed. The chips in the Newton have "160" stamped on them - presumably
their qualified speed.

The MCCFG can divide the core clock by a number between 2-9, although the
specs say that a bus speed 0f 66Mhz is the fastest the chip supports. This
means that if you increase the clock frequency using the CCCFG pins, you can
adjust the bus frequency down using he MCCFG pins.

So in theory you can increase your Newton's speed with a few wiring changes
and still preserve the bus speed. This may also make serial devices
continue to work assuming that there speed is proportional to the bus speed.

Anyone care to try it out on their Newton? The StrongARM manual may be
retrieved at

    ftp://download.intel.com/design/strong/manuals/27805801.pdf

Alex Karahalios

***************************************
NewtonTalk brought to you by:

EVOTE.COM -- the ESPN of politics on the Internet! All the players, all the news, and the hottest analysis and features (plus 'toons!) anywhere.... visit http://www.evote.com today!

***************************************
Need Subscribe/Unsubscribe info?

Visit the NewtonTalk section at http://www.planetnewton.com



This archive was generated by hypermail 2b29 : Fri Sep 01 2000 - 00:00:15 CDT